Seybold Report ISSN: 1533-9211
Kashapaga Soni
Assistant Professor, Department of electronics and Communication Engineering
Sridevi Women’s Engineering College, Hyderabad, India, sonikashapaga@gmail.com
Murala Roshitha
U.G Student, Department of Electronics and Communication Engineering, Sridevi Women’s Engineering College, Hyderabad, India
Modukuri Ramya
U.G Student, Department of Electronics and Communication Engineering, Sridevi Women’s Engineering College, Hyderabad, India
Errola Nirosha
U.G Student, Department of Electronics and Communication Engineering, Sridevi Women’s Engineering College, Hyderabad, India
Vol 17, No 07 ( 2022 ) | DOI: 10.5281/zenodo.6877538 | Licensing: CC 4.0 | Pg no: 150-155 | Published on: 25-07-2022
Abstract
The article provides a new proposed system for reconfigurable constant multiplication for fpga’s as it improves the 70% accuracy compared to that of existing system. For every constant multiplication here, we are using the control units to store the shift registers to avoid the conflict for every constant multiplication of (zeros). This is mostly used in filtering techniques and digital signal processing (DSP). Further included VDHL code generation based on Xilinx software.
Keywords:
Fpga’s, VHDL, shift registers, control units